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Design of BJT-JFET Operational Amplifiers on the Master Slice Array

https://doi.org/10.35596/1729-7648-2023-21-6-29-36

Abstract

The use of dual-gate field-effect transistors located on the base matrix crystal MH2XA031, controlled by a p–n junction needed to reduce the input current of operational amplifiers is studied. Typical circuits of operational amplifiers, containing: source repeaters connected to the inputs of the operational amplifier on complementary bipolar transistors; input differential stage on p-JFET with a “current mirror” load on n–p–n-transistors; input differential in the form of a “folded cascode” on a p-JFET are analyzed. To minimize the input current, it is re commended to use bootstrapped feedback to keep the drain-to-source voltage of the input JFETs low, independent of the input common-mode voltage, and to connect only the top gate of the dual-gate JFET to the op-amp input. The electrical circuits for MH2XA031 elements and the results of circuit simulation of the developed amplifiers, called OAmp10J, OAmp11.1, OAmp11.2, are presented. Accounting the established features of the input stages and operating modes of active elements in circuit design will allow to create an operational amplifier with the required combination of basic parameters.

About the Authors

A. V. Kunts
Belarusian State University of Informatics and Radioelectronics; Institute for Nuclear Problems of Belarusian State University
Belarus

Kunts Aliaksei Vadimovich, Postgraduate; Junior Researcher at the Electronic Methods and Experiment Means Laboratory

220013, Minsk, P. Brovki St., 6

Tel.: +375 44 726-30-92



O. V. Dvornikov
Open Joint Stock Company “Minsk Research Instrument-Making Institute”
Belarus

Oleg V. Dvornikov, Dr. of Sci. (Tech.), Associate Professor, Principal Researcher

Minsk



V. A. Tchekhovski
Institute for Nuclear Problems of Belarusian State University
Belarus

Vladimir A. Tchekhovski, Head of the Laboratory “Electronic Methods and Experiment Means”

Minsk



References

1. Dvornikov O. V., Tchekhovcsi V. A., Prokopenko N. N., Galkin Ya. D., Kunts A. V., Chumakov V. E. (2023) A High-Speed Broadband Operational Amplifiers on a Master Slice Array. Proceedings of Universities. Electronics. 28 (1), 96–111 (in Russian).

2. Close, Santos (1993) A JFET Input Single Supply Operational Amplifier with Rail-to-Rail Output. Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting. USA, Minneapolis, MN. 149–152. Doi: 10.1109/BIPOL.1993.617487.

3. Snoeij M. F., Ivanov M. V. (2011) A 36 V JFET-Input Bipolar Operational Amplifier with 1 μV/°C Maximum Offset Drift and −126 dB Total Harmonic Distortion. IEEE International Solid-State Circuits Conference. USA, San Francisco, CA. 248–250. Doi: 10.1109/ISSCC.2011.5746305.

4. Snoeij M. F. (2018) A 36 V 48 MHz JFET-Input Bipolar Operational Amplifier with 150 µV Maximum Offset and Overload Supply Current Control. ESSCIRC 2018 – IEEE 44th European Solid State Circuits Conference (ESSCIRC). Germany, Dresden. 290–293. Doi: 10.1109/ESSCIRC.2018.8494262.

5. He Z., Wang C., Fan G., Zhou Y., Yang Y. (2019) Design of a High Input Impedance OPA with Bi-JFET Technology. IEEE 2nd International Conference on Electronics Technology (ICET). China, Chengdu. 233–236. Doi: 10.1109/ELTECH.2019.8839538.

6. Galkin Y. D., Dvornikov O. V., Tchekhovski V. A. (2022) Double Gate JFET Improved Model for Analog Integrated Circuits. Doklady BGUIR. 20 (3), 20–25. https://doi.org/10.35596/1729-7648-2022-20-3-20-25 (in Russian).

7. Grove A. S. (1967) Physics and Technology of Semiconductor Devices. New York, Wiley Publ. 388.

8. Dostal I. (1982) Operational Amplifiers. Moscow, Mir Publ. 512 (in Russian).

9. Dvornikov O. V., Tchekhovski V. A., Prokopenko N. N., Pakhomov I. V. (2020) Reducing Noises of High-Speed Bi-JFET Charge-Sensitive Amplifiers During Schematic Design. Materials Science and Engineering, IOP Conference Series. 8. Doi: 10.1088/1757-899X/862/2/022068.


Review

For citations:


Kunts A.V., Dvornikov O.V., Tchekhovski V.A. Design of BJT-JFET Operational Amplifiers on the Master Slice Array. Doklady BGUIR. 2023;21(6):29-36. (In Russ.) https://doi.org/10.35596/1729-7648-2023-21-6-29-36

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