Research of Electrophysical Properties of Thin Gate Dielectrics Obtained by Rapid Thermal Processing Method

Researches of the electrophysical characteristics of gate dielectrics obtained by the rapid thermal processing (RTP) method by two-stage and three-stage processes have been carried out. Each photonic processing (stage) was carried out for 12 s at a constant power of halogen lamps and heating the wafers to a maximum temperature of 1250 °C. The first two stages of the process were carried out in an oxygen atmosphere, the third - in nitrogen or a forming gas. It was found that for dielectrics obtained by the process with final processing in a nitrogen atmosphere, the absolute value of the voltage of flat zones is 0.42 V less, than for insulators, formed by a two-stage process. This is the consequence of the elimination of a significant part of the defects, responsible for the presence of Coulomb centers in the dielectric layer. Carrying out photonic processing in anitrogen atmosphere at high temperatures of procedures for proceeding of the restructuring of the structure of the dielectric layer. For insulators obtained by a three-stage process with final processing in N₂, an increase in dielectric strength and breakdown voltage by 1 V and 3.3 MV/cm, respectively, is observed in comparison with dielectrics, obtained by a two-stage process. An increase in dielectric strength indicates relaxation of elastic stresses of deformed bonds and compensation for dangling bonds both in the dielectric and at its interface with Si during high-temperature photonic treatment. Passivation by nitrogen atoms of deformations at the dielectric/semiconductor interface will also have a positive effect on the strength of the insulator.

1. Deleonibus S. Electronic Devices Architectures for the NANO-CMOS Era. Boca Rotation: CRC Press; 2019.

2. Fair R.B. Rapid thermal processing: science and technology. Boston: Academic Press; 1993.

3. Borisenko V.E. Hesketh P.J. Rapid Thermal Processing of Semiconductors. New York: Springer Science+Business Media; 1997.

4. Krasnikov G.Ya. [Design and technological features of submicron MOS transistors]. Moscow: Technosphere; 2011. (in Russ.)

5. Nishi Y., Doering R. Handbook of semiconductor manufacturing technology. Воса Raton: CRC press; 2008.

6. Kovalchuk N.S., Omelchenko A.A., Pilipenko V.A. [Formation of a gate dielectric of nanometer thickness by rapid thermal process]. Doklady BGUIR = Doklady BGUIR. 2021;4:103-112. DOI: 10.35596/1729-7648-2021-19-4-103-112. (in Russ.)

7. Sze S.M., Lee M.K. Semiconductor Devices: Physics and Technology. New York: John Wiley & Sons Singapore Pte. Limited; 2012.

8. Belous A.I., Solodukha V.A., Shvedov S.V. [Space electronics]. Book 1. Moscow: Technosphere; 2015. (in Russ.)

9. Nalwa H.S. Handbook of surfaces and interfaces of materials, five-volume set. San Diego: Elsevier; 2001.

10. Fleetwood D.M. Border traps and bias-temperature instabilities in MOS devices. Microelectronics Reliability. 2018;80:266-277. DOI: 10.1016/j.microrel.2017.11.007.

11. Grasser T. Noise in Nanoscale Semiconductor Devices. Cham: Springer Nature; 2020.

12. Odzaev V.B., Panfilenko A.K., Pyatlitski A.N. [Influence of ion implantation of nitrogen on the electrophysical properties of the gate dielectric of power MOS transistors]. Zhurnal Belorusskogo gosudarstvennogo universiteta. Fizika = Journal of the Belarusian State University. Physics. 2020;3:55-64. DOI: 10.33581/2520-2243-2020-3-55-64. (in Russ.)

13. Vitiello М., Lopez N., Illas F., Pacchioni G. H2 Cracking at SiO2 Defect Centers. The Journal of Physical Chemistry A. 2000;104(20):4674-4684. DOI: 10.1021/jp993214f.

14. Cartier E., Buchanan D.A., Dunn G.J. Atomic hydrogen-induced interface degradation of reoxidized-nitrided silicon dioxide on silicon. Applied physics letters. 1994;64(7):901-903. DOI: 10.1063/1.110990.

15. Cezhou Z., Desheng Z., Baohua S. Hot carrier effect – model, mechanism and effects on CV and IV characteristics in MOS structures. Microelectronics Reliability. 1996;36(4):493-496. DOI: 10.1016/0026-2714(96)00172-2.