Double Gate JFET Improved Model for Analog Integrated Circuits
https://doi.org/10.35596/1729-7648-2022-20-3-20-25
Abstract
A double gate JFETs are often used in analog integrated circuits to provide an extremely low input current and capacitance when the top gate is controlled. Circuit synthesis and modeling of analog IC with such a field-effect transistor are possible only if there are models that adequately describe the features of its operation, namely, changing of the current-voltage characteristics by the top gate controlling when a constant reverse voltage is applied to the bottom gate. The article considers the modernization of the well-known electrical model of the double gate field-effect transistor for the LTSpice software, which includes taking into account the influence of the top gate voltage by connecting two series-connected functional voltage sources to the top gate, one of which ensures the coincidence of the measurement results and the simulation of the drain current at a low voltage between the top gate and the source, and the second – when the voltage between the top gate and the source is close to the cutoff voltage. A method for identifying the parameters of functional voltage sources is presented. The proposed model of a double gate field-effect transistor is advisable to use in the IC design of various analog devices, especially electrometric operational amplifiers and charge-sensitive amplifiers.
About the Authors
Y. D. Galkin
Belarusian State University of Informatics and Radioelectronics; Institute for Nuclear Problems of Belarusian State University
Belarus
Galkin Yaroslav Denisovich, Postgraduate at the Belarusian State University of Informatics and Radioelectronics, Junior Researcher at the Electronic Methods and Experiment Means Laboratory of Research Institute for Nuclear Problems of Belarusian State University.
220013, Minsk, P. Brovki St., 6
tel. +375-257-250-775
Minsk Research Instrument-Making Institute JSC (MNIPI JSC)
Belarus
Dvornikov O.V., Dr. of Sci., Associate Professor, Main Researcher
Institute for Nuclear Problems of Belarusian State University
Belarus
Tchekhovski V.A., Head of the “Electronic Methods and Experiment Means Laboratory”
References
1. Close J.P., Counts L.W.A 50-fA junction-isolated operational amplifier. IEEE Journal of Solid - State Circuits. 1988;23(3):843-851. https://doi.org/10.1109/4.328.
2. Nanver L.K., Goudena E. J. G. Design considerations for integrated high-frequency p-channel JFETs. IEEE Transactions on Electron Devices. 1988;35(11):1924-1934. https://doi.org/10.1109/16.7406.
3. Fazzi A., Rehak P. «Gate-to-gate» BJT obtained from the double-gate input JFET to reset charge preamplifiers. Nuclear Instruments and Methods in Physics Research. 1996;A377:453-458. https://doi.org/10.1016/0168-9002(96)00238-0.
4. Fazzi A., Rehak P. A double-gate double-feedback JFET charge-sensitive preamplifier. Nuclear Instruments and Methods in Physics Research. 1996; A380(1-2):346-349. https://doi.org/10.1016/S0168-9002(96)00355-5.
5. Baturitsky M.A., Dvornikov O.V. The double-gate p-JFET-inputted amplifier for low-capacitance detectors. Nuclear Instruments and Methods in Physics Research. 1998;419(1):99-104. https://doi.org/10.1016/S0168-9002(98)00900-0.
6. Galkin Y.D., Dvornikov O.V., Tchekhovski V.A., Prokopenko N.N. [Experimental studies and a double gate JFET model for analog integrated circuits]. Doklady BGUIR = Doklady BGUIR. 2021;19(7):5-12. https://doi.org/10.35596/1729-7648-2021-19-7-5-12. (In Russ.)
7. Dvornikov O.V., Tchekhovsky V.A., Prokopenko N.N., Galkin Y.D., Kunts A.V., Chumakov V.E. [Analog integrated circuits design for extreme environmental conditions on the base of master slice array MN2KhA031]. Problemyrazrabotki perspektivnyh mikro- i nanoelektronnyh sistem (MES). 2021;1(2):37-46. https://doi.org/10.31114/2078-7707-2021-2-37-46. (In Russ.)
8. Volodin V.Y. [LTspice: computer modeling electonic systems]. S.-Peterburg.: BHV-Peterburg; 2010. (In Russ.)
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