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<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">bsuir</journal-id><journal-title-group><journal-title xml:lang="ru">Доклады БГУИР</journal-title><trans-title-group xml:lang="en"><trans-title>Doklady BGUIR</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">1729-7648</issn><issn pub-type="epub">2708-0382</issn><publisher><publisher-name>БГУИР</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.35596/1729-7648-2025-23-5-5-11</article-id><article-id custom-type="elpub" pub-id-type="custom">bsuir-4201</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>Статьи</subject></subj-group></article-categories><title-group><article-title>Вертикальные токопроводящие переходы  в диэлектрических подложках  на основе анодного оксида алюминия</article-title><trans-title-group xml:lang="en"><trans-title>Vertical Conductive Transitions in Dielectric Substrates Based on Anodic Aluminum Oxide</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Цаладонов</surname><given-names>А. Д.</given-names></name><name name-style="western" xml:lang="en"><surname>Tsaladonov</surname><given-names>A. D.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Цаладонов А. Д., магистрант каф. микро- и наноэлектроники, </p><p>Минск.</p></bio><bio xml:lang="en"><p>Tsaladonov A. D., Master’s Student at the Micro- and Nanoelectronics Department, </p><p>Minsk.</p></bio><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Ревенько</surname><given-names>Д. В.</given-names></name><name name-style="western" xml:lang="en"><surname>Revenko</surname><given-names>D. V.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Ревенько Д. В., магистрант каф. микро- и наноэлектроники, </p><p>Минск.</p></bio><bio xml:lang="en"><p>Revenko D. V., Master’s Student at the Micro- and Nanoelectronics Department, </p><p>Minsk.</p></bio><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Биран</surname><given-names>С. А.</given-names></name><name name-style="western" xml:lang="en"><surname>Biran</surname><given-names>S. A.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Биран Сергей Андреевич, ст. преп. каф. микро- и наноэлектроники,</p><p>220013, Минск, ул. П. Бровки, 6.</p><p>Тел.: +375 17 293-88-90</p></bio><bio xml:lang="en"><p>Biran Siarhei Andreevich, Senior Lecturer at the Department of Micro- and Nanoelectronics, </p><p>6, P. Brovki St., Minsk, 220013.</p><p>Тel.: +375 17 293-88-90</p></bio><email xlink:type="simple">biran@bsuir.by</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Короткевич</surname><given-names>А. В.</given-names></name><name name-style="western" xml:lang="en"><surname>Korotkevich</surname><given-names>A. V.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Короткевич А. В., канд. техн. наук, доц., доц. каф. микро- и наноэлектроники, </p><p>Минск.</p></bio><bio xml:lang="en"><p>Korotkevich A. V., Cand. Sci. (Tech.), Associate Professor, Associate Professor at the Department of Micro- and Nanoelectronics, </p><p>Minsk.</p></bio><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Новиков</surname><given-names>П. Э.</given-names></name><name name-style="western" xml:lang="en"><surname>Novikov</surname><given-names>P. E.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Новиков П. Э., инж.-электрон. науч.-исслед. лаб. «Компьютерное проектирование микро- и наноэлектронных систем», </p><p>Минск.</p></bio><bio xml:lang="en"><p>Novikov P. E., Electronics Engineer of the R&amp;D Laboratory “CAD in Micro- and Nanoelectronics Systems”,</p><p>Minsk.</p></bio><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Корсак</surname><given-names>К. В.</given-names></name><name name-style="western" xml:lang="en"><surname>Korsak</surname><given-names>K. V.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Корсак К. В., мл. науч. сотр. науч.-исслед. лаб. «Компьютерное проектирование микро- и наноэлектронных систем», </p><p>Минск.</p></bio><bio xml:lang="en"><p>Korsak K. V., Junior Researcher of the R&amp;D Laboratory “CAD in Micro- and Nanoelectronics Systems”,</p><p>Minsk.</p></bio><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Белорусский государственный университет информатики и радиоэлектроники (БГУИР)</institution></aff><aff xml:lang="en"><institution>Belarusian State University of Informatics and Radioelectronics (BSUIR)</institution></aff></aff-alternatives><pub-date pub-type="collection"><year>2025</year></pub-date><pub-date pub-type="epub"><day>29</day><month>10</month><year>2025</year></pub-date><volume>23</volume><issue>5</issue><fpage>5</fpage><lpage>11</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Цаладонов А.Д., Ревенько Д.В., Биран С.А., Короткевич А.В., Новиков П.Э., Корсак К.В., 2025</copyright-statement><copyright-year>2025</copyright-year><copyright-holder xml:lang="ru">Цаладонов А.Д., Ревенько Д.В., Биран С.А., Короткевич А.В., Новиков П.Э., Корсак К.В.</copyright-holder><copyright-holder xml:lang="en">Tsaladonov A.D., Revenko D.V., Biran S.A., Korotkevich A.V., Novikov P.E., Korsak K.V.</copyright-holder><license xml:lang="ru" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>Данная работа распространяется под лицензией Creative Commons Attribution 4.0.</license-p></license><license xml:lang="en" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>This work is licensed under a Creative Commons Attribution 4.0 License.</license-p></license></permissions><self-uri xlink:href="https://doklady.bsuir.by/jour/article/view/4201">https://doklady.bsuir.by/jour/article/view/4201</self-uri><abstract><p>Развитие технологий 2,5D- и 3D-интеграций кристаллов предъявляет к корпусам изделий микроэлектроники повышенные требования. Для изготовления корпусов перспективным материалом является анодный оксид алюминия, который позволяет формировать межслойные вертикальные электрические соеди нения различных слоев без дополнительных операций создания отверстий в межслойной изоляции. Это дает возможность получать на поверхности последующие слои с хорошей планаризацией. В статье рассмотрен способ изготовления подложек из пористого анодного оксида алюминия с изолированными токопроводящими площадками с помощью сквозного локального анодирования алюминия. Приведена методика исследования изоляционных свойств полученных диэлектрических подложек с различными способами улучшения качества изоляции токопроводящих каналов. Представлены результаты исследования токов утечки изолированных токопроводящих каналов в зависимости от приложенного напряжения.</p></abstract><trans-abstract xml:lang="en"><p>The development of 2.5D and 3D crystal integration technologies imposes increased requirements on the housings of microelectronic products. A promising material for the manufacture of housings is anodic aluminum oxide, which allows the formation of interlayer vertical electrical connections of different layers without additional operations of creating holes in the interlayer insulation. This makes it possible to obtain subsequent layers on the surface with good planarization. The article considers a method for manufacturing substrates from porous anodic aluminum oxide with insulated conductive pads using through local anodizing of aluminum. A metho dology for studying the insulating properties of the obtained dielectric substrates with various methods for improving the quality of insulation of conductive channels is presented. The results of a study of leakage currents of isolated conductive channels depending on the applied voltage are presented.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>2</kwd><kwd>5D- и 3D-интеграция кристаллов</kwd><kwd>корпуса изделий микроэлектроники</kwd><kwd>наноструктурированные материалы</kwd><kwd>пористый анодный оксид алюминия</kwd><kwd>локальное анодирование</kwd></kwd-group><kwd-group xml:lang="en"><kwd>2.5D and 3D crystal integration</kwd><kwd>microelectronics product housings</kwd><kwd>nanostructured materials</kwd><kwd>porous anodic aluminum oxide</kwd><kwd>local anodization</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Advanced Packaging Market Size, Share &amp; Trends Analysis Report by Packaging Type (Flip-Chip, Fan-Out WLP, Embedded-Die, Fan-In WLP, 2.5D/3D), Application (Consumer Electronics, Automotive, Industrial, Healthcare), Region, with Growth Forecasts, 2025–2030 [Electronic Resource]. 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