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<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">bsuir</journal-id><journal-title-group><journal-title xml:lang="ru">Доклады БГУИР</journal-title><trans-title-group xml:lang="en"><trans-title>Doklady BGUIR</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">1729-7648</issn><issn pub-type="epub">2708-0382</issn><publisher><publisher-name>БГУИР</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.35596/1729-7648-2024-22-6-81-89</article-id><article-id custom-type="elpub" pub-id-type="custom">bsuir-4026</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>Статьи</subject></subj-group></article-categories><title-group><article-title>Конструктивные решения приборных структур биполярных транзисторов с изолированным затвором и вертикальным расположением канала</article-title><trans-title-group xml:lang="en"><trans-title>Design Solutions for Device Structures of Bipolar Transistors with an Insulated Gate and a Vertical Channel Arrangement</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Нгуен</surname><given-names>Чонг Тхань</given-names></name><name name-style="western" xml:lang="en"><surname>Nguyen</surname><given-names>Trong Thanh</given-names></name></name-alternatives><bio xml:lang="ru"><p>Чонг Тхань Нгуен, асп. каф. микро- и наноэлектроники</p><p>г. Минск</p></bio><bio xml:lang="en"><p>Trong Thanh Nguyen, Postgraduate at the Department of Micro- and Nanoelectronics</p><p>Minsk</p></bio><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Ха</surname><given-names>Дао Динь</given-names></name><name name-style="western" xml:lang="en"><surname>Ha</surname><given-names>Dao Dinh</given-names></name></name-alternatives><bio xml:lang="ru"><p>Дао Динь Ха, канд. тех. наук, преп. каф. микропроцессорной техники</p><p>г. Ханой</p></bio><bio xml:lang="en"><p>Dao Dinh Ha, Саnd. of Sci., Lecturer at the Department of Microprocessor Engineering</p><p>Hanoi</p></bio><xref ref-type="aff" rid="aff-2"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Ловшенко</surname><given-names>И. Ю.</given-names></name><name name-style="western" xml:lang="en"><surname>Lovshenko</surname><given-names>I. Yu.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Ловшенко Иван Юрьевич, зав. науч.-исслед. лаб. «Компьютерное проектирование микро- и наноэлектронных систем» (НИЛ 4.4)</p><p>220013, г. Минск, ул. П. Бровки, 6</p><p>Тел.: +375 17 293-88-90</p></bio><bio xml:lang="en"><p>Lovshenko Ivan Yur’evich, Head of the R&amp;D Lab. “Computer-Aided Design of Micro- and Nanoelectronic Systems” (Lab 4.4)</p><p>220013, Minsk, P. Brovki St., 6</p><p>Тел.: +375 17 293-88-90</p><p> </p></bio><email xlink:type="simple">lovshenko@bsuir.by</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Стемпицкий</surname><given-names>В. Р.</given-names></name><name name-style="western" xml:lang="en"><surname>Stempitsky</surname><given-names>V. R.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Стемпицкий В. Р., канд. тех. наук, доц., проректор по научной работе, науч. рук. НИЛ 4.4</p><p>г. Минск</p></bio><bio xml:lang="en"><p>Stempitsky V. R., Саnd. of Sci., Associate Professor, Vice-Rector for Academic Affairs, Adviser of the Research Lab 4.4</p><p>Minsk</p></bio><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Белорусский государственный университет информатики и радиоэлектроники</institution></aff><aff xml:lang="en"><institution>Belarusian State University of Informatics and Radioelectronics</institution></aff></aff-alternatives><aff-alternatives id="aff-2"><aff xml:lang="ru"><institution>Вьетнамский государственный технический университет имени Ле Куй Дона</institution></aff><aff xml:lang="en"><institution>Le Quy Don University of Science and Technology</institution></aff></aff-alternatives><pub-date pub-type="collection"><year>2024</year></pub-date><pub-date pub-type="epub"><day>28</day><month>12</month><year>2024</year></pub-date><volume>22</volume><issue>6</issue><fpage>81</fpage><lpage>89</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Нгуен Ч.Т., Ха Д.Д., Ловшенко И.Ю., Стемпицкий В.Р., 2024</copyright-statement><copyright-year>2024</copyright-year><copyright-holder xml:lang="ru">Нгуен Ч.Т., Ха Д.Д., Ловшенко И.Ю., Стемпицкий В.Р.</copyright-holder><copyright-holder xml:lang="en">Nguyen T.T., Ha D.D., Lovshenko I.Y., Stempitsky V.R.</copyright-holder><license xml:lang="ru" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>Данная работа распространяется под лицензией Creative Commons Attribution 4.0.</license-p></license><license xml:lang="en" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>This work is licensed under a Creative Commons Attribution 4.0 License.</license-p></license></permissions><self-uri xlink:href="https://doklady.bsuir.by/jour/article/view/4026">https://doklady.bsuir.by/jour/article/view/4026</self-uri><abstract><p>Представлены результаты компьютерного моделирования эксплуатационных характеристик приборных структур биполярного транзистора с изолированным затвором (англ. IGBT) и вертикальным расположением канала, сформированных в соответствии с технологиями Trench-IGBT, суперпереходной Trench-IGBT (SJ-IGBT), SJ-IGBT с глубокой канавкой (DT-SJ-IGBT), SJ-IGBT с плавающей p-областью (FP-SJ-IGBT) и Trench-IGBT со ступенчатым легированным коллектором. Рассмотрены особенности функционирования конструктивных решений такого биполярного транзистора. Исследована конструкция Trench-IGBT со ступенчатым легированным коллектором, которая обеспечивает уменьшение потерь при выключении.</p></abstract><trans-abstract xml:lang="en"><p>This work presents the results of computer simulations of the operational characteristics of vertical channel Insulated Gate Bipolar Transistor (IGBT) device structures designed according to the following technologies: Trench-IGBT, Superjunction Trench-IGBT (SJ-IGBT), Deep Trench SJ-IGBT (DT-SJ-IGBT), Floating p-region SJ-IGBT (FP-SJ-IGBT), and Step-Doped Collector Trench-IGBT. The operating principles of these insulated gate bipolar transistor design solutions are discussed. A particular focus is placed on the Step-Doped Collector Trench-IGBT structure, which demonstrates reduced switching losses.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>биполярный транзистор с изолированным затвором</kwd><kwd>конструкция</kwd><kwd>технология изготовления</kwd><kwd>статические и динамические характеристики</kwd><kwd>компьютерное моделирование</kwd></kwd-group><kwd-group xml:lang="en"><kwd>insulated gate bipolar transistor</kwd><kwd>device structure</kwd><kwd>fabrication technology</kwd><kwd>static and dynamic characteristics</kwd><kwd>computer simulation</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Хэнкок, Д. Ключевые моменты при выборе Super-Junction MOSFET / Д. Хэнкок // Электронные компоненты. 2011. № 2. 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