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<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">bsuir</journal-id><journal-title-group><journal-title xml:lang="ru">Доклады БГУИР</journal-title><trans-title-group xml:lang="en"><trans-title>Doklady BGUIR</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">1729-7648</issn><issn pub-type="epub">2708-0382</issn><publisher><publisher-name>БГУИР</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.35596/1729-7648-2024-22-5-71-79</article-id><article-id custom-type="elpub" pub-id-type="custom">bsuir-3984</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>Статьи</subject></subj-group></article-categories><title-group><article-title>Метод повышения скорости выполнения алгоритма фазового преобразования</article-title><trans-title-group xml:lang="en"><trans-title>A Method for Speed Up the Allpass Transformation Algorithm</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Порхун</surname><given-names>М. И.</given-names></name><name name-style="western" xml:lang="en"><surname>Porhun</surname><given-names>M. I.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Порхун Максим Игоревич, магистр техн. наук, ст. преп. каф. электронных вычислительных средств</p><p>220013, г. Минск, ул. П. Бровки, 6</p><p>Тел.: +375 17 293-84-20</p></bio><bio xml:lang="en"><p>Porhun Maxim Igorevich, M. of Sci., Senior Lecturer at the Electronic Computing Facilities Department</p><p>220013, Minsk, P. Brovki St., 6</p><p>Tel.: +375 17 293-84-20</p></bio><email xlink:type="simple">porhun@bsuir.by</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Вашкевич</surname><given-names>М. И.</given-names></name><name name-style="western" xml:lang="en"><surname>Vashkevich</surname><given-names>M. I.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Вашкевич М. И., д-р техн. наук, проф. каф. электронных вычислительных средств</p><p>г. Минск</p></bio><bio xml:lang="en"><p>Vashkevich M. I., Dr. of Sci. (Tech.), Professor at the Electronic Computing Facilities Department</p><p>Minsk</p></bio><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Белорусский государственный университет информатики и радиоэлектроники</institution><country>Беларусь</country></aff><aff xml:lang="en"><institution>Belarusian State University of Informatics and Radioelectronics</institution><country>Belarus</country></aff></aff-alternatives><pub-date pub-type="collection"><year>2024</year></pub-date><pub-date pub-type="epub"><day>24</day><month>10</month><year>2024</year></pub-date><volume>22</volume><issue>5</issue><fpage>71</fpage><lpage>79</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Порхун М.И., Вашкевич М.И., 2024</copyright-statement><copyright-year>2024</copyright-year><copyright-holder xml:lang="ru">Порхун М.И., Вашкевич М.И.</copyright-holder><copyright-holder xml:lang="en">Porhun M.I., Vashkevich M.I.</copyright-holder><license xml:lang="ru" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>Данная работа распространяется под лицензией Creative Commons Attribution 4.0.</license-p></license><license xml:lang="en" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>This work is licensed under a Creative Commons Attribution 4.0 License.</license-p></license></permissions><self-uri xlink:href="https://doklady.bsuir.by/jour/article/view/3984">https://doklady.bsuir.by/jour/article/view/3984</self-uri><abstract><p>Рассмотрены два алгоритма вычисления фазового преобразования, заключающегося в расчете выходов цепочки фазовых звеньев. В основе алгоритмов лежит идея синтеза сдвоенного фазового звена, которое позволяет за один проход вычислять выходы каскада из двух фазовых звеньев. Для синтеза сдвоенных фазовых звеньев использовано представление цифровых фильтров методом пространства состояний. Предложенные алгоритмы реализованы на языке Си, выполнено их сравнение с прямой формой реализации фазового преобразования. В процессе экспериментов при помощи встроенного в среду Visual Studio профилировщика оценивалась скорость вычисления цепочки фазовых звеньев на персональном компьютере с процессором Intel Core i7-37700. Полученные результаты показали, что оба алгоритма позволяют ускорить вычисление цепочки фазовых звеньев в 1,3 и 1,8 раза соответственно.</p></abstract><trans-abstract xml:lang="en"><p>Two algorithms for calculating the phase transformation, which consists in calculating the outputs of a chain of phase links, are considered. The algorithms are based on the idea of synthesis of a dual phase link, which allows calculating the outputs of a cascade of two-phase links in one pass. To synthesize dual phase links, the representation of digital ﬁlters by the space state method is used. The proposed algorithms are implemented in the C language, and they are compared with the direct form of implementation of the phase transformation. During the experiments, the speed of calculating the chain of phase links on a personal computer with an Intel Core i7-37700 processor was estimated using the proﬁler built into the Visual Studio environment. The results showed that both algorithms allow accelerating the calculation of the chain of phase links by 1.3 and 1.8 times, respectively.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>фазовое преобразование</kwd><kwd>цепочка фазовых звеньев</kwd><kwd>пространство состояний</kwd><kwd>сдвоенное фазовое звено</kwd></kwd-group><kwd-group xml:lang="en"><kwd>phase transformation</kwd><kwd>allpass chain</kwd><kwd>state-space</kwd><kwd>dual allpass filter</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Vary, P. Digital Filter Banks with Unequal Resolution / Р. Vary // Short Communication Digest of European Signal Processing Conference (EUSIPCO). 1980. P. 41–42.</mixed-citation><mixed-citation xml:lang="en">Vary P. (1980) Digital Filter Banks with Unequal Resolution. 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